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Acer HN274H 120Hz 3D LCD Monitor - Product Overview (

Extended display identification data

Background

The channel for transmitting the EDID from the display to the graphics card is usually the IC bus, defined in DDC2B (DDC1 used a different serial format which never gained popularity).

Before DDC and EDID were defined, there was no standard way for a graphics card to know to what kind of display device it was connected. Some VGA connectors in personal computers provided a basic form of identification by connecting one, two or three pins to ground, but this coding was not standardized.

The EDID is often stored in the monitor in a memory device called a serial PROM (programmable read-only memory) or EEPROM (electrically erasable PROM) and is accessible via the IC bus at address 0x50.

Many software packages can read and display the EDID information, such as read-edid and PowerStrip for Microsoft Windows and XFree86 (which will output the EDID to the log if verbose logging is on (startx -- -logverbose 6)) for Linux and BSD unix. On Linux you can also see the raw EDID in hexadecimal format if you run "xrandr --verbose". Mac OS X natively reads EDID information (see /var/log/system.log or hold down Cmd-V on startup) and programs such as SwitchResX or DisplayConfigX can display the information as well as use it to define custom resolutions.

Enhanced EDID (E-EDID)

Enhanced EDID was introduced at the same time as E-DDC; it introduced EDID structure version 1.3 which supports multiple extensions blocks and deprecated EDID version 2.0 structure (although it can be supported as an extension). Data fields for preferred timing, range limits, monitor name are required in E-EDID. E-EDID also supports dual GTF timings and aspect ratio change[clarification needed].

With the use of extensions, E-EDID string can be lengthened up to 32 KBytes.

EDID Extensions assigned by VESA

Timing Extension (00h)

Additional Timing Data Block (CEA EDID Timing Extension) (02h)

Video Timing Block Extension (VTB-EXT) (10h)

EDID 2.0 Extension (20h)

Display Information Extension (DI-EXT) (40h)

Localized String Extension (LS-EXT) (50h)

Microdisplay Interface Extension (MI-EXT) (60h)

Display Transfer Characteristics Data Block (DTCDB) (A7h, AFh, BFh)

Block Map (F0h)

Display Device Data Block (DDDB) (FFh)

Extension defined by monitor manufacturer (FFh): According to LS-EXT, actual contents varies from manufacturer. However, the value is later used by DDDB.

Revision history

August 1994, DDC standard version 1 - EDID v1.0 structure.

April 1996, EDID standard version 2 - EDID v1.1 structure.

1997, EDID standard version 3 - EDID structures v1.2 and v2.0

February 2000, E-EDID Standard Release A, v1.0 - EDID structure v1.3, EDID structure v2.0 deprecated

September 2006 - E-EDID Standard Release A, v2.0 - EDID structure v1.4

Limitations

Some graphics card drivers have historically coped poorly with the EDID, using only its standard timing descriptors rather than its Detailed Timing Descriptors (DTDs). Even in cases where the DTDs were read, the drivers are/were still often limited by the standard timing descriptor limitation that the horizontal/vertical resolutions must be evenly divisible by 8. This means that many graphics cards cannot express the native resolutions of the most common wide screen flat panel displays and liquid crystal display televisions. The number of vertical pixels is calculated from the horizontal resolution and the selected aspect ratio. To be fully expressible, the size of wide screen display must thus be a multiple of 169 pixels. For 1366768 pixel Wide XGA panels the nearest resolution expressible in the EDID standard timing descriptor syntax is 1360765 pixels, typically leading to 3 pixel thin black bars. Specifying 1368 pixels as the screen width would yield an unnatural screen height of 769.5 pixels.

Many Wide XGA panels do not advertise their native resolution in the standard timing descriptors, instead offering only a resolution of 1280768. Some panels advertise a resolution only slightly smaller than the native, such as 1360765. For these panels to be able to show a pixel perfect image, the EDID data must be ignored by the display driver or the driver must correctly interpret the DTD and be able to resolve resolutions whose size is not divisible by 8. Special programs are available to override the standard timing descriptors from EDID data; PowerStrip for Microsoft Windows and SwitchResX for Mac OS X. Even this is not always possible however, as some vendors' graphics drivers (notably those of Intel) require specific registry hacks to implement custom resolutions, which can make it very difficult to use the screen's native resolution.

EDID 1.3 data format

Byte sequence

00-19

Header information

0007

Header information "00h FFh FFh FFh FFh FFh FFh 00h"

0809

Manufacturer ID. These IDs are assigned by Microsoft. "00001=A; 00010=B; ... 11010=Z. Bit 7 (at address 08h) is 0, the first character (letter) is located at bits 6 2 (at address 08h), the second character (letter) is located at bits 1 & 0 (at address 08h) and bits 7 5 (at address 09h), and the third character (letter) is located at bits 4 0 (at address 09h).

1011

Product ID Code (stored as LSB first). Assigned by manufacturer.

1215

32-bit Serial Number. No requirement for the format. Usually stored as LSB first. In order to maintain compatibility with previous requirements the field should set at least one byte of the field to be non-zero if an ASCII serial number descriptor is provided in the detailed timing section.

16

Week of Manufacture. This varies by manufacturer. One way is to count January 1-7 as week 1, January 8-15 as week 2 and so on. Some count based on the week number (Sunday-Saturday). Valid range is 1-54.

17

Year of Manufacture. Add 1990 to the value for actual year.

18

EDID Version Number "01h"

19

EDID Revision Number "03h"

20-24

Basic display parameters

20

Video input definition

7

0=analog

1=digital

6

video level

00=0.7, 0.3; 01=0.714, 0.286; 10=1, 0.4; 11=0.7, 0

5

4

blank-to-black setup

3

separate syncs

2

composite sync

1

sync on green

0

serration vsync

1=DFP 1.x compatible

21

Maximum Horizontal Image Size (in centimeters).

22

Maximum Vertical Image Size (in centimetres).

23

Display Gamma. Divide by 100, then add 1 for actual value.

24

Power Management and Supported Feature(s):

7

standby

6

suspend

5

active-off/low power

4

Display type:

00=monochrome, 01=RGB colour, 10=non RGB multicolour, 11=undefined

3

2

standard colour space

1

preferred timing mode

0

default GTF supported

25-34

Chromaticity coordinates

25

low significant bits for Red X (bit 7-6), Red Y (bit 5-4), Green X (bit 3-2), Green Y (bit 1-0).

26

low significant bits for Blue X (bit 7-6), Blue Y (bit 5-4), White X (bit 3-2), White Y (bit 1-0).

2734

high significant bits for Red X, Red Y, Green X, Green Y, Blue X, Blue Y, White X, White Y. To decode actual value, rearrange bits as follows: High significant bits 7-0 for (channel), low significant bits for (channel). Actual value is between 0.000 and 0.999, but encoded value is between 000h and 3FFh.

35

Established timing I:

720400@70 Hz, 720400@88 Hz, 640480@60 Hz, 640480@67 Hz, 640480@72 Hz, 640480@75 Hz, 800600@56 Hz, 800600@60 Hz

36

Established timing II:

800600@72 Hz, 800600@75 Hz, 832624@75 Hz, 1024768@87 Hz (Interlaced), 1024768@60 Hz, 1024768@70 Hz, 1024768@75 Hz, 12801024@75 Hz

37

Manufacturer's reserved timing:

00h for none

bit 7: 1152x870 @ 75 Hz (Mac II, Apple)

3853

Standard timing identification

First byte: Horizontal resolution. Multiply by 8, then add 248 for actual value.

Second byte:

bit 7-6

Aspect ratio. Actual vertical resolution depends on horizontal resolution.

00=16:10, 01=4:3, 10=5:4, 11=16:9 (00=1:1 prior to v1.3)

bit 5-0

Vertical frequency. Add 60 to get actual value.

5471

Descriptor Block 1

5455

Pixel Clock (in 10 kHz) or 0 (55 MSB 54 LSB)

If Pixel Clock is non null:

56: Horizontal Active (in pixels)

57: Horizontal Blanking (in pixels)

58: Horizontal Active high (4 upper bits)

Horizontal Blanking high (4 lower bits)

59: Vertical Active (in lines)

60: Vertical Blanking (in lines)

61: high significant bits for Vertical Active (4 upper bits)

high significant bits for Vertical Blanking (4 lower bits)

62: Horizontal Sync Offset (in pixels)

63: Horizontal Sync Pulse Width (in pixels)

64: Vertical Sync Offset (in lines) (4 upper bits)

Vertical Sync Pulse Width (in lines) (4 lower bits)

65: high significant bits for Horizontal Sync Offset (bit 7-6)

high significant bits for Horizontal Sync Pulse Width (bit 5-4)

high significant bits for Vertical Sync Offset (bit 3-2)

high significant bits for Vertical Sync Pulse Width (bit 1-0)

66: Horizontal Image Size (in mm)

67: Vertical Image Size (in mm)

68: high significant bits for Horizontal Image Size (4 upper bits)

high significant bits for Vertical Image Size (4 lower bits)

69: Horizontal Border (in pixels representing only one side)

70: Vertical Border (in lines representing only one side)

71: Interlaced or not (bit 7)

Stereo or not (bit 6-5) ("00" means not)

Separate Sync or not (bit 4-3)

Vertical Sync positive or not (bit 2)

Horizontal Sync positive or not (bit 1)

Stereo Mode (bit 0) (unused if 6-5 are 00)

If Pixel Clock is null:

56: 0

57: Block type

FFh=Monitor Serial Number, FEh=ASCII string, FDh=Monitor Range Limits, FCh=Monitor name,

FBh=Colour Point Data, FAh, Standard Timing Data, F9h=Currently undefined,

0Fh=defined by manufacturer

58: 0

5971: Descriptor block contents.

If block type is FFh, FEh, or FCh, the entire area is a text string.

If block type is FDh:

5963:

Min Vertical frequency, Max Vertical frequency,

Min Horizontal frequency (in kHz), Max Horizontal frequency (in kHz), pixel clock

(in MHz (multiply by 10 for actual value))

6465: Secondary GTF toggle

If encoded value is 000A, bytes 59-63 are used. If encoded value is 0200,

bytes 6771 are used.

66: Start horizontal frequency (in kHz). Multiply by 2 for actual value.

67: C. Divide by 2 for actual value.

68-69: M (stored as LSB first).

70: K

71: J. Divide by 2 for actual value.

If block type is FBh:

59: W Index 0. If set to 0, bytes 60-63 are not used. If set to 1, 6163 are

assigned to white point index #1

64: W Index 1. If set to 0, bytes 65-68 are not used. If set to 2, 6568 are

assigned to white point index #2

White point index structure:

First byte

bit 3-2: low significant bits for White X (bit 3-2), White Y (bit 1-0)

Second to third byte: high significant bits for White X, White Y.

Fourth byte: Gamma. Divide by 100, then add 1 for actual value.

To decode White X and White Y, see bytes 25-34.

If block type is FAh:

5970: Standard Timing Identification. 2 bytes for each record.

For structure details, see bytes 38-53.

7289

Descriptor Block 2

90107

Descriptor Block 3

108125

Descriptor Block 4

126

Extension Flag. This is the number of extension blocks which follow this block. Prior to EDID 1.3, it is ignored, and should be set to 0.

127

Checksum. This byte should be programmed such that the sum of all 128 bytes equals 00h.

For example, here is a summary of the data reported by an Envision EN-775e monitor:

Monitor Name EPI EnVision EN-775e

Monitor ID EPID775

Model EN-775e

Manufacture Date Week 26 / 2002

Serial Number 1226764172

Max. Visible Display Size 32 cm 24 cm (15.7 in)

Picture Aspect Ratio 4:3

Horizontal Frequency 3072 kHz

Vertical Frequency 50160 Hz

Maximum Resolution 12801024

Gamma 2.20

DPMS Mode Support Active-Off

Supported Video Modes:

640480 140 Hz

800600 110 Hz

1024768 85 Hz

1152864 75 Hz

12801024 65 Hz

Monitor Manufacturer:

Company Name Envision, Inc.

Extension Block Details

The CEA EDID Timing Extension was first introduced in EIA/CEA-861, and has since been updated several times, most notably with the -861B revision (which was version 3 of the extension, adding Short Video Descriptors and advanced audio capability/configuration information), -861D (which contains updates to the audio segments), and -861E which is the most recent.

Version 1 (as defined in -861) allowed the specification of video timings only through the use of 18-byte Detailed Timing Descriptors (as detailed in EDID 1.3 data format above). In all cases, the "preferred" timing should be the first DTD listed in a CEA EDID Timing Extension.

Version 2 (as defined in -861A) added the capability to designate a number of DTDs as "native" and also included some "basic discovery" functionality for whether the display device contains support for "basic audio", YCbCr pixel formats, and underscan.

Per Version 3 (from the -861B spec), there are two different ways to specify the timings of available DTV formats: via the use of 18-byte Detailed Timing Descriptors as in Version 1 & 2, and via the use of the Short Video Descriptor (see below). HDMI 1.0 -1.3c uses this version.

Included in Version 3 are four new optional types of data blocks: Video Data Blocks (containing the aforementioned Short Video Descriptors), Audio Data Blocks (containing Short Audio Descriptors), Speaker Allocation Data Blocks (containing information about the speaker configuration of the display device), and Vendor Specific Data Blocks (which can contain information specific to a given vendor's use).

CEA EDID Timing Extension Version 3 data format

Byte sequence

00: Extension tag (which kind of extension block this is); 02h for CEA EDID

01: Revision number (Version number); 03h for Version 3

02: Byte number "d" within this block where the 18-byte DTDs begin. If no non-DTD data is present

in this extension block, the value should be set to 04h (the byte after next). If set to 00h,

there are no DTDs present in this block and no non-DTD data.

03: Number of DTDs present, other Version 2+ information

bit 7: 1 if display supports underscan, 0 if not

bit 6: 1 if display supports basic audio, 0 if not

bit 5: 1 if display supports YCbCr 4:4:4, 0 if not

bit 4: 1 if display supports YCbCr 4:2:2, 0 if not

bit 3..0: total number of native formats in the DTDs included in this block

04: Start of Data Block Collection. If byte 02 is set to 04h, this is where the DTD collection

begins. If byte 02 is set to another value, byte 04 is where the Data Block Collection begins,

and the DTD collection follows immediately thereafter.

The Data Block Collection contains one or more data blocks detailing video, audio, and speaker

placement information about the display. The blocks can be placed in any order, and the initial

byte of each block defines both its type and its length:

bit 7..5: Block Type Tag (1 is audio, 2 is video, 3 is vendor specific, 4 is speaker

allocation, all other values Reserved)

bit 4..0: Total number of bytes in this block following this byte

Once one data block has ended, the next byte is assumed to be the beginning of the next data

block. This is the case until the byte (designated in Byte 02, above) where the DTDs are known

to begin.

Any Audio Data Block contains one or more 3-byte Short Audio Descriptors (SADs). Each SAD

details audio format, channel number, and bitrate/resolution capabilities of the display as

follows:

SAD Byte 1 (format and number of channels):

bit 7: Reserved (0)

bit 6..3: Audio format code

1 = Linear Pulse Code Modulation (LPCM)

2 = AC-3

3 = MPEG1 (Layers 1 and 2)

4 = MP3

5 = MPEG2

6 = AAC

7 = DTS

8 = ATRAC

0, 15: Reserved

9 = One-bit audio aka SACD

10 = DD+

11 = DTS-HD

12 = MLP/Dolby TrueHD

13 = DST Audio

14 = Microsoft WMA Pro

bit 2..0: number of channels minus 1 (i.e. 000 = 1 channel; 001 = 2 channels; 111 =

8 channels)

SAD Byte 2 (sampling frequencies supported):

bit 7: Reserved (0)

bit 6: 192kHz

bit 5: 176kHz

bit 4: 96kHz

bit 3: 88kHz

bit 2: 48kHz

bit 1: 44kHz

bit 0: 32kHz

SAD Byte 3 (bitrate):

For LPCM, bits 7:3 are reserved and the remaining bits define bit depth

bit 2: 24 bit

bit 1: 20 bit

bit 0: 16 bit

For all other sound formats, bits 7..0 designate the maximium supported bitrate divided by

8kHz.

Any Video Data Block will contain one or more 1-byte Short Video Descriptors (SVDs). They are

decoded as follows:

bit 7: 1 to designate that this should be considered a "native" resolution, 0 for non-native

bit 6..0: index value to a table of standard resolutions/timings from CEA/EIA-861E:

Code

Short Aspect

Name Ratio HxV @ F

1 DMT0659 4:3 640x480p @ 59.94/60Hz

2 480p 4:3 720x480p @ 59.94/60Hz

3 480pH 16:9 720x480p @ 59.94/60Hz

4 720p 16:9 1280x720p @ 59.94/60Hz

5 1080i 16:9 1920x1080i @ 59.94/60Hz

6 480i 4:3 720(1440)x480i @ 59.94/60Hz

7 480iH 16:9 720(1440)x480i @ 59.94/60Hz

8 240p 4:3 720(1440)x240p @ 59.94/60Hz

9 240pH 16:9 720(1440)x240p @ 59.94/60Hz

10 480i4x 4:3 (2880)x480i @ 59.94/60Hz

11 480i4xH 16:9 (2880)x480i @ 59.94/60Hz

12 240p4x 4:3 (2880)x240p @ 59.94/60Hz

13 240p4xH 16:9 (2880)x240p @ 59.94/60Hz

14 480p2x 4:3 1440x480p @ 59.94/60Hz

15 480p2xH 16:9 1440x480p @ 59.94/60Hz

16 1080p 16:9 1920x1080p @ 59.94/60Hz

17 576p 4:3 720x576p @ 50Hz

18 576pH 16:9 720x576p @ 50Hz

19 720p50 16:9 1280x720p @ 50Hz

20 1080i25 16:9 1920x1080i @ 50Hz*

21 576i 4:3 720(1440)x576i @ 50Hz

22 576iH 16:9 720(1440)x576i @ 50Hz

23 288p 4:3 720(1440)x288p @ 50Hz

24 288pH 16:9 720(1440)x288p @ 50Hz

25 576i4x 4:3 (2880)x576i @ 50Hz

26 576i4xH 16:9 (2880)x576i @ 50Hz

27 288p4x 4:3 (2880)x288p @ 50Hz

28 288p4xH 16:9 (2880)x288p @ 50Hz

29 576p2x 4:3 1440x576p @ 50Hz

30 576p2xH 16:9 1440x576p @ 50Hz

31 1080p50 16:9 1920x1080p @ 50Hz

32 1080p24 16:9 1920x1080p @ 23.98/24Hz

33 1080p25 16:9 1920x1080p @ 25Hz

34 1080p30 16:9 1920x1080p @ 29.97/30Hz

35 480p4x 4:3 (2880)x480p @ 59.94/60Hz

36 480p4xH 16:9 (2880)x480p @ 59.94/60Hz

37 576p4x 4:3 (2880)x576p @ 50Hz

38 576p4xH 16:9 (2880)x576p @ 50Hz

39 108Oi25 16:9 1920x1080i(1250 Total) @ 50Hz*

40 1080i50 16:9 1920x1080i @ 100Hz

41 720p100 16:9 1280x720p @ 100Hz

42 576p100 4:3 720x576p @ 100Hz

43 576p100H 16:9 720x576p @ 100Hz

44 576i50 4:3 720(1440)x576i @ 100Hz

45 576i50H 16:9 720(1440)x576i @ 100Hz

46 1080i60 16:9 1920x1080i @ 119.88/120Hz

47 720p120 16:9 1280x720p @ 119.88/120Hz

48 480p119 4:3 720x480p @ 119.88/120Hz

49 480p119H 16:9 720x480p @ 119.88/120Hz

50 480i59 4:3 720(1440)x480i @ 119.88/120Hz

51 480i59H 16:9 720(1440)x480i @ 119.88/120Hz

52 576p200 4:3 720x576p @ 200Hz

53 576p200H 16:9 720x576p @ 200Hz

54 576i100 4:3 720(1440)x576i @ 200Hz

55 576i100H 16:9 720(1440)x576i @ 200Hz

56 480p239 4:3 720x480p @ 239.76/240Hz

57 480p239H 16:9 720x480p @ 239.76/240Hz

58 480i119 4:3 720(1440)x480i @ 239.76/240Hz

59 480i119H 16:9 720(1440)x480i @ 239.76/240Hz

60 720p24 16:9 1280x720p @ 23.98/24Hz

61 720p25 16:9 1280x720p @ 25Hz

62 720p30 16:9 1280x720p @ 29.97/30Hz

63 1080p120 16:9 1920x1080 @ 119.88/120Hz

0, 64 - 127 Reserved

*Short video descriptors 20 & 39 are both 1920x1080i@50 16:9 but differ in the amount of vertical

total lines which are 1125 and 1250, respectively.

Notes: Parentheses indicate instances where pixels are repeated to meet the minimum speed

requirements of the interface. For example, in the 720X240p case, the pixels on each line

are double-clocked. In the (2880)X480i case, the number of pixels on each line, and thus

the number of times that they are repeated, is variable, and is sent to the DTV monitor by

the source device.

Increased Hactive expressions include 2x and 4x indicate two and four times the reference

resolution, respectively.

The CEA/EIA-861/A standard included only numbers 1-7 and numbers 17-22 above(but not as short

video descriptors which were introduced in CEA/EIA-861B) and are considered primary video format

timings.

The CEA/EIA-861B standard included the first 34 short video descriptors above.

The CEA/EIA-861D standard included the first 59 short video descriptors above.

HDMI 1.0 to HDMI 1.2a uses the CEA-861-B video standard, HDMI 1.3 to HDMI 1.3c uses the

CEA-861-D video standard, and HDMI 1.4 uses the CEA/EIA-861E video standard.

A Vendor Specific Data Block (if any) contains as its first three bytes the vendor's IEEE

24-bit registration number, LSB first. For HDMI, it is always 00-0C-03 for HDMI Licensing, LLC.

It is followed by a two byte source physical address, LSB first. The source physical address

provides the CEC physical address for upstream CEC devices.

The remainder of the Vendor Specific Data Block is the "data payload",which can be anything the

vendor considers worthy of inclusion in this EDID extension block. HDMI 1.3a specifies some

requirements for the data payload. See that spec for detailed info on these bytes:

VSD Byte 1-3 IEEE Registration Identifier (LSB First)

VSD Byte 4-5 Components of Source Physical Address (See section 8.7 of HDMI 1.3a)

VSD Byte 6 (bits are set if sink supports...):

bit 7: Supports_AI (...a function that needs info from ACP or ISRC packets)

bit 6: DC_48bit (...16-bit-per-channel deep color)

bit 5: DC_36bit (...12-bit-per-channel deep color)

bit 4: DC_30bit (...10-bit-per-channel deep color)

bit 3: DC_Y444 (...4:4:4 in deep color modes)

bit 2: Reserved (0)

bit 1: Reserved (0)

bit 0: DVI_Dual (...DVI Dual Link Operation)

VSD Byte 7 If non-zero (Max_TMDS_Frequency / 5mhz)

VSD Byte 8 (latency fields indicators):

bit 7: latency_fields (set if latency fields are present)

bit 6: i_latency_fields (set if interlaced latency fields are present; if set

four latency fields will be present, 0 if bit 7 is 0)

bits 5-0: Reserved (0)

VSD Byte 9 Video Latency (if indicated, value=1+ms/2 with a max of 251 meaning 500ms)

VSD Byte 10 Audio Latency (video delay for progressive sources, same units as above)

VSD Byte 11 Interlaced Video Latency (if indicated, same units as above)

VSD Byte 12 Interlaced Audio Latency (video delay for interlaced sources, same units as above)

Additional bytes may be present, but the HDMI spec says they shall be zero.

If a Speaker Allocation Data Block is present, it will consist of three bytes. The second and

third are Reserved (all 0), but the first contains information about which speakers are present in

the display device:

bit 7: Reserved (0)

bit 6: Rear Left Center / Rear Right Center present for 1, absent for 0

bit 5: Front Left Center / Front Right Center present for 1, absent for 0

bit 4: Rear Center present for 1, absent for 0

bit 3: Rear Left / Rear Right present for 1, absent for 0

bit 2: Front Center present for 1, absent for 0

bit 1: LFE present for 1, absent for 0

bit 0: Front Left / Front Right present for 1, absent for 0

Note that for speakers with right and left polarity, it is assumed that both

left and right are present.

"d": byte (designated in byte 02) where DTDs begin. 18-byte DTD strings continue for an unspecified

length (modulo 18) until a "00 00" is as the first bytes of a prospective DTD. At this point,

the DTDs are known to be complete, and the start address of the "00 00" can be considered to be "XX"

(see below)

"XX"-126: Post-DTD padding. Should be populated with 00h

127: Checksum - This byte should be programmed such that the sum of all 128 bytes equals 00h.

See also

List of computer standards

References

^ DDC/CI specifications

^ read-edid software for Linux and Windows

^ PowerStrip for Windows (Shareware)

^ SwitchResX for Mac OS X shows EDID and customizes display timings

^ DisplayConfigX for Mac OS X shows EDID and customizes display timings

^ Archibel (2009-08-07). "Custom Resolutions on Intel Graphics". http://software.intel.com/en-us/articles/custom-resolutions-on-intel-graphics/. Retrieved 2009-11-04. 

External links

What is EDID? White Paper by Hall Research - this is an advertisement!

VESA BIOS Extensions/Display Data Channel Standard - no longer available without registration, link is not working!

VESA ENHANCED EXTENDED DISPLAY IDENTIFICATION DATA Implementation Guide - no longer available without registration, link is not working!

EDID 1.2 on Flat Panels (in Appendix A) - no longer available without registration, link is not working!

HDMI 1.3a Spec has additional details and restrictions on the Extension Block

Extensions

VESA Video Timing Block Extension Data Standard (VTB-EXT) - no longer available without registration, link is not working!

VESA Display Information Extension Block Standard (DI-EXT) - no longer available without registration, link is not working!

VESA Enhanced EDID Localized String Extension Standard (LS-EXT) - no longer available without registration, link is not working!

Software

MonInfo for Windows (Free for personal use). EDID, CEA-ext and DisplayID Analysis Tool

softMCCS for Windows (Freeware). EDID Analysis Tool

NirSoft - Windows Freeware Utilities

MonitorInfoView GUI

DumpEDID command line

Phoenix EDID Editor (Freeware)

Categories: Display technology | VESAHidden categories: Articles needing cleanup from June 2009 | All pages needing cleanup | Wikipedia articles needing clarification from June 2009
About the Author

I am an expert from China Crafts Suppliers, usually analyzes all kind of industries situation, such as hd15 to hdmi , blue plug wires.

How do i get my HDTV to run my PC games Smoothly?

I recently hooked my HDTV(Samsung 46" LCD 120Hz) to PC via a DVI to HDMI(NVIDIA 9600GT) connection the problem i am having is i am trying to play a game called "Titans Quest" and the game itself runs like it refreshes and takes a while to do so, the colors of some things are out of whack and no trees features anywhere when there are supposed to be. how do i fix it so that my PC game runs smoothly on my HDTV?

Change the resolution, or refresh rate.
Or your computer cant handle HDTV